1. Field of the Invention
The present invention relates to the low voltage device and high voltage device fabrication, and further particularly to a method for simultaneously forming low voltage device and high voltage device.
2. Description of the Prior Art
Recently, demand for semiconductor devices has rapidly increased owing to widespread use of electronic equipment. In particular, the increasing popularity of some electronic equipment such as, for example, computers, is increasing the demand for large semiconductor device. Integrated circuit (IC) for periphery of computer, for example, the IC in the monitor and input/output circuit simultaneously needs controlling circuit and driving IC. In most cases, low voltage device is used for the control circuit while high voltage device is used for driving IC. However, except for the above devices many devices need integrated low voltage and high voltage devices, for example, the liquid crystal display in the notebook and electric devices in a watch. Hence, integrated low voltage and high voltage devices are used in many places.
A conventional metal-oxide-semiconductor field effect transistor (MOSFET) is shown by FIG. 1, and particularly for N channel MOSFET where source region 130A and drain region 130B are N+, substrate 110 is p-well and gate 150 is polysilicon. The MOSFET in FIG. 1 that can only accept low voltage such as 5 V or 3 V is a standard low voltage device. A low voltage P channel MOSFET can be formed similarity. When the integrity in the semiconductor devices is increasing, one N channel MOSFET that can prevent short channel effect is designed in FIG. 2. Such design is called lightly doped drain (LDD), wherein the concentration of LDD 133A/133B is more light than source/drain regions 132A/132B with gate 152 and source/drain regions 132A/132B as well as FIG. 1. The LDD design increases the dissipation of energy, and one high voltage MOSFET is designed in FIG. 3 which shows N channel MOSFET wherein the light concentration is lightly doped regions 133A/133B and field oxide layer 140A/140B prevents gate region 154 and source/drain regions 134A/134B short-circuit under high voltage.
In conventional low voltage and high voltage devices, only the drain region needs to be operated under high voltage, so a serial resist is usually connected to source region as is shown in FIG. 3. This makes lower driving current and can not tolerate higher threshold voltage. In addition, the low voltage device for controlling the current generally need small layout rule and high voltage device for driving IC only needs drain region to be operated under high voltage, the devices in FIG. 1 and FIG. 3 can not meet the above requirement.